Synopsys, Inc.
Combined average of Moat (AI Resilience), Growth, and Valuation scores.
Moat Score
Co-dominant EDA tools provider with deeply embedded software workflows used by every advanced chip designer; Ansys (one year consolidated as of this print) extends the moat into multiphysics simulation. A July 2026 demo of an AI model taping out a toy 45nm design on open-source EDA sparked a moat-durability scare and a sharp selloff, but foundry-certified leading-edge flows (3nm/2nm, 3D-IC) remain non-substitutable. The Q3 beat-and-raise does not mark the moat up.
Synopsys's moat is built on mission-critical software embedded in every advanced chip tape-out:
- Workflow Lock-In: Every modern chip from NVIDIA, Apple, AMD, and Qualcomm passes through Synopsys's design and verification flows. Switching tools mid-roadmap costs years and risks tape-out failure — making the leading-edge EDA toolchain effectively non-substitutable. Open-source EDA remains confined to legacy nodes (e.g. 45nm academic libraries); it has no foundry-certified path at 3nm/2nm. This print did not produce a new filing that changes that.
- Ansys Multiphysics Stack: The ~$35B Ansys acquisition (closed mid-2025) bolts simulation onto silicon design. Q3 FY2026 is one year after close — the third full quarter of consolidation — with FY2026 Ansys contribution guided at $2.98B (exhibit footnote). Processor IP Solutions divestiture closed (≈$40M FY revenue impact); Optical Solutions Group and PowerArtist RTL ≈$110M. Call: first joint product, Multiphysics Fusion, launched; monetization still guided to FY2027 toward $400M revenue synergies by year four. Do not mark this pillar up because they beat.
- AI Chip Design Tailwind: AI accelerator complexity (multi-die, 3D-IC, advanced packaging) drives EDA tool intensity. The print's EDA outperformance and the raised FY guide (exhibit) sit on that demand, not on a new moat. DSO.ai / VSO.ai 800+ commercial tape-outs and July 27 AgentEngineer remain last-sourced product color; this 8-K does not restate those counts.
Moat Verdict
Synopsys remains broadly AI-resilient at the leading edge: rising chip complexity increases EDA tool intensity, and the Cadence duopoly is protected by tape-out risk aversion, foundry certification cycles, and decades of accumulated methodology IP (the strong transactionEmbedding, systemOfRecord, bundling and proprietaryData moats). The Q3 FY2026 beat ($2.477B / $3.91 vs a $2.46B / $3.69 high end) does not change that, and it does not repair the soft spots: regulatory lock-in stays weakened because the guide still assumes no further export-control or Entity List changes, and businessLogic stays intact — not strong — on the July 2026 Kimi 45nm open-source signal. Ansys is one year in, with Processor IP closed and Optical/PowerArtist in the FY footnote; joint-product monetization is still a FY2027 item. Net: still an AI beneficiary at the advanced node, with a credible long-tail AI-disruption watch item at the commodity end.
82.9 resilient · 71.0 vulnerable · 80/20 = 80.5 · = 80
Open a moat to read its note.
Synopsys sells specialised engineering software to chip designers, not consumer-facing UI experiences.
EDA design rules, verification methodologies, and place-and-route algorithms encode decades of accumulated chip-design IP. A July 2026 AI demo (Moonshot Kimi) taped out a toy 45nm die on open-source tools, showing the low end is exposed over time — but foundry-certified leading-edge flows remain years beyond AI/open-source replication. CEO color on the Q3 call that AI is a demand driver, not a substitute, is not a new filing; status held.
Synopsys does not derive moat from public data access.
EDA tool architects, verification methodology experts, and physical design engineers are extraordinarily scarce; Synopsys's R&D org embeds 30+ years of know-how unavailable elsewhere.
The full flow from RTL synthesis through physical design, verification, IP and now Ansys multiphysics is tightly integrated, but Cadence sells an equivalent full flow, so the bundle raises switching cost without being one competitors cannot match. Re-rated from strong to intact in the proof-point pass; Processor IP Solutions is divested.
Telemetry from 800+ commercial AI-driven tape-outs feeds DSO.ai and VSO.ai, but the designs belong to customers and Cadence trains on the same kind of data; scale of customer data is not uniqueness (same bar as Snowflake and Cadence). Re-rated from strong to intact in the proof-point pass.
EDA has no inherent certification moat; U.S.-China export policy is the swing factor, and Synopsys's targets assume no further export-control or Entity List changes. That is regulatory risk, charged in the growth keyRisk rather than scored here as an eroded moat. Previously weakened.
A three-sided lock between foundries, EDA vendors and chip designers: TSMC, Samsung and Intel certify Synopsys and its duopoly peer's reference flows for each new node first, designers need certified flows to tape out, and a third vendor cannot get certified early enough to matter. That loop is why Cadence and Synopsys together hold roughly 60–70% of the EDA market and Siemens EDA has stayed a distant third for decades. Distinct from the tape-out switching cost rated under transactionEmbedding.
Every advanced chip tape-out runs Synopsys tools at multiple stages, and switching mid-program risks delays worth tens of millions per slip. The lock is structural: Cadence and Synopsys together hold roughly 60–70% of the EDA market, with Siemens EDA a distant third, and foundry certification cycles keep it that way.
Design databases, verification environments and IP libraries hold design history, but that lock is the tape-out embedding already rated strong under transactionEmbedding, and design data moves through open formats (OpenAccess, GDSII). Re-rated from strong to intact so one fact is not scored twice.
Software at near-zero marginal cost: scale shows up as network effects, data or bundling, which are rated there. No separate unit-cost lead to credit.
Buyers are enterprises choosing on switching cost, integration and performance, which the other pillars rate. The name carries reputation, not a price premium it could hold on brand alone.
Combined average of Moat (AI Resilience), Growth, and Valuation scores.
Moat Score
Co-dominant EDA tools provider with deeply embedded software workflows used by every advanced chip designer; Ansys (one year consolidated as of this print) extends the moat into multiphysics simulation. A July 2026 demo of an AI model taping out a toy 45nm design on open-source EDA sparked a moat-durability scare and a sharp selloff, but foundry-certified leading-edge flows (3nm/2nm, 3D-IC) remain non-substitutable. The Q3 beat-and-raise does not mark the moat up.
Growth Score
Q3 FY2026 (quarter ended July 31, reported Aug 26) printed revenue $2.477B ($2,476.822M in exhibit 99.1), +42% from $1.740B a year ago, above the prior $2.410–2.460B Q3 guide. GAAP EPS $2.84; non-GAAP EPS $3.91 vs the prior $3.63–3.69 high. Design Automation $2,003.0M (80.9%; adj. segment margin 45.2% vs 44.5% YoY). Design IP $473.8M (19.1%; +11% YoY vs $427.6M, +4% QoQ vs last-sourced Q2 $454M) — the named return to year-over-year growth. Q3 non-GAAP operating margin 41.6%. The Aug 26 test — Q3 vs the $2.46B / $3.69 high end — did not fire. FY2026 raised: revenue $9.690–9.740B (mid $9.715B; Ansys $2.98B), non-GAAP EPS $15.04–15.10 (mid $15.07), non-GAAP operating margin ~41.5% midpoint, FCF ~$2.6B / OCF ~$2.8B / capex ~$225M. Q4 guided $2.530–2.580B revenue and non-GAAP EPS $4.10–4.16. Targets assume no further export-control or Entity List changes. Call (not in 99.1): EDA +8.5% YoY against a 16% prior-year compare, expected to print double-digit in Q4 and for the full year; Q3 FCF $746M; backlog $10.9B (Processor IP divestiture). Investor Day remains September 30. Underlying 3–5 year organic growth is still the 10–15% blended path (EDA high-single to low-double digits plus Ansys now in the run-rate) — not a mark-up from the +42% Ansys-inflated print.
Valuation Score
Regular-session close $464.89 on Aug 27 (Yahoo Finance; market cap $89.017B). Aug 26 close $410.00 was pre-print (8-K accepted 4:21pm ET; call 2:00pm PT) — do not use. Unchanged ladder $320 / $470 / $600. At $464.89 the stock is 1% below the $470 base and 97% of the way from bear to base — piecewise 66, down from the Aug 10 card's 74 at ~$417 because the tape ripped +13.4% on the print. The Q3 beat-and-raise does not move the ladder. Live valuation will recompute against the tape; this static 66 is the Aug 27 close against the held corridor.
The EDA Workflow Lock-In Moat
Synopsys's moat is built on mission-critical software embedded in every advanced chip tape-out:
- Workflow Lock-In: Every modern chip from NVIDIA, Apple, AMD, and Qualcomm passes through Synopsys's design and verification flows. Switching tools mid-roadmap costs years and risks tape-out failure — making the leading-edge EDA toolchain effectively non-substitutable. Open-source EDA remains confined to legacy nodes (e.g. 45nm academic libraries); it has no foundry-certified path at 3nm/2nm. This print did not produce a new filing that changes that.
- Ansys Multiphysics Stack: The ~$35B Ansys acquisition (closed mid-2025) bolts simulation onto silicon design. Q3 FY2026 is one year after close — the third full quarter of consolidation — with FY2026 Ansys contribution guided at $2.98B (exhibit footnote). Processor IP Solutions divestiture closed (≈$40M FY revenue impact); Optical Solutions Group and PowerArtist RTL ≈$110M. Call: first joint product, Multiphysics Fusion, launched; monetization still guided to FY2027 toward $400M revenue synergies by year four. Do not mark this pillar up because they beat.
- AI Chip Design Tailwind: AI accelerator complexity (multi-die, 3D-IC, advanced packaging) drives EDA tool intensity. The print's EDA outperformance and the raised FY guide (exhibit) sit on that demand, not on a new moat. DSO.ai / VSO.ai 800+ commercial tape-outs and July 27 AgentEngineer remain last-sourced product color; this 8-K does not restate those counts.
Moat Verdict
Synopsys remains broadly AI-resilient at the leading edge: rising chip complexity increases EDA tool intensity, and the Cadence duopoly is protected by tape-out risk aversion, foundry certification cycles, and decades of accumulated methodology IP (the strong transactionEmbedding, systemOfRecord, bundling and proprietaryData moats). The Q3 FY2026 beat ($2.477B / $3.91 vs a $2.46B / $3.69 high end) does not change that, and it does not repair the soft spots: regulatory lock-in stays weakened because the guide still assumes no further export-control or Entity List changes, and businessLogic stays intact — not strong — on the July 2026 Kimi 45nm open-source signal. Ansys is one year in, with Processor IP closed and Optical/PowerArtist in the FY footnote; joint-product monetization is still a FY2027 item. Net: still an AI beneficiary at the advanced node, with a credible long-tail AI-disruption watch item at the commodity end.
82.9 resilient · 71.0 vulnerable · 80/20 = 80.5 · = 80
Open a moat to read its note.
Synopsys sells specialised engineering software to chip designers, not consumer-facing UI experiences.
EDA design rules, verification methodologies, and place-and-route algorithms encode decades of accumulated chip-design IP. A July 2026 AI demo (Moonshot Kimi) taped out a toy 45nm die on open-source tools, showing the low end is exposed over time — but foundry-certified leading-edge flows remain years beyond AI/open-source replication. CEO color on the Q3 call that AI is a demand driver, not a substitute, is not a new filing; status held.
Synopsys does not derive moat from public data access.
EDA tool architects, verification methodology experts, and physical design engineers are extraordinarily scarce; Synopsys's R&D org embeds 30+ years of know-how unavailable elsewhere.
The full flow from RTL synthesis through physical design, verification, IP and now Ansys multiphysics is tightly integrated, but Cadence sells an equivalent full flow, so the bundle raises switching cost without being one competitors cannot match. Re-rated from strong to intact in the proof-point pass; Processor IP Solutions is divested.
Telemetry from 800+ commercial AI-driven tape-outs feeds DSO.ai and VSO.ai, but the designs belong to customers and Cadence trains on the same kind of data; scale of customer data is not uniqueness (same bar as Snowflake and Cadence). Re-rated from strong to intact in the proof-point pass.
EDA has no inherent certification moat; U.S.-China export policy is the swing factor, and Synopsys's targets assume no further export-control or Entity List changes. That is regulatory risk, charged in the growth keyRisk rather than scored here as an eroded moat. Previously weakened.
A three-sided lock between foundries, EDA vendors and chip designers: TSMC, Samsung and Intel certify Synopsys and its duopoly peer's reference flows for each new node first, designers need certified flows to tape out, and a third vendor cannot get certified early enough to matter. That loop is why Cadence and Synopsys together hold roughly 60–70% of the EDA market and Siemens EDA has stayed a distant third for decades. Distinct from the tape-out switching cost rated under transactionEmbedding.
Every advanced chip tape-out runs Synopsys tools at multiple stages, and switching mid-program risks delays worth tens of millions per slip. The lock is structural: Cadence and Synopsys together hold roughly 60–70% of the EDA market, with Siemens EDA a distant third, and foundry certification cycles keep it that way.
Design databases, verification environments and IP libraries hold design history, but that lock is the tape-out embedding already rated strong under transactionEmbedding, and design data moves through open formats (OpenAccess, GDSII). Re-rated from strong to intact so one fact is not scored twice.
Software at near-zero marginal cost: scale shows up as network effects, data or bundling, which are rated there. No separate unit-cost lead to credit.
Buyers are enterprises choosing on switching cost, integration and performance, which the other pillars rate. The name carries reputation, not a price premium it could hold on brand alone.
Growth Analysis
Growth Drivers
Key Risk
The Q3 test (print vs the $2.46B / $3.69 high end on Aug 26) did not fire. Next hard test is Q4 FY2026 revenue $2.530–2.580B and the company's double-digit EDA claim for Q4 and FY (call; 8-K is silent on the organic EDA rate). Falsifiable: Q4 revenue prints below $2.53B, FY EDA growth fails to print double-digit, or a subsequent guide cuts FY26 revenue below $9.69B / non-GAAP EPS below $15.04. Residual: open-source and AI-generated EDA (Moonshot Kimi 45nm demo) moving toward commercial nodes within 2–3 years; nearer term, further U.S. export-control or Entity List tightening — the Q4/FY targets explicitly assume none — or auto/industrial capex softness. Processor IP is closed (≈$40M); Optical/PowerArtist ≈$110M are already in the FY footnote, not a still-pending deal risk.
Score Derivation
76.4 base + 1.3 trajectory + 4 margin − 5 risk = 77
Base 76 (10–15% CAGR, midpoint 12.5%, baseFromCagr: 70+((12.5−8)/7)×10 = 76.43) + 1.3 trajectory (1 of 3 drivers accelerating) + 4 margin expanding − 5 moderate keyRisk = 77. Do not bump because they beat. The old author string that added +3 TAM expansion and printed 79 is retired — primaryType does not score.
Price Scenarios (12–24 Months)
Valuation Multiples
| Trailing P/E (GAAP) | ~81× |
| Forward P/E (FY26, non-GAAP) | ~31× |
| PEG Ratio | ~1.5× |
| Price / Sales (FY26) | ~9.2× |
| Price / FCF (FY26E) | ~34× |
Post-print tape $464.89 (Aug 27 close, Yahoo) ripped +13.4% from the $410.00 Aug 26 pre-print close and sits 1% below the held $470 base. Forward multiple is ~31× on the company's own $15.07 FY26 EPS midpoint and ~9.2× FY26 revenue — a re-rate vs the Aug 10 ~28× / ~8.3× at ~$417, back near the ~30× five-year average the live card cited, not a reason to raise the ladder. Yahoo 1y target est $558.25 / high $650 (quote page; Rosenblatt $575 was Aug 25, pre-print). 52-week range $366.00–$615.79. The beat-and-raise and $2.6B FCF still support a franchise multiple; the margin of safety is thinner after the rip. Next test is Q4 $2.53–2.58B and double-digit EDA, not a restated ladder.
Approximate figures as of August 26, 2026.
Where We Are vs Targets
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The AI/open-source-EDA disruption narrative gains credibility, further export-control or Entity List tightening hits the guide's explicit assumption of no change, and an auto/industrial slowdown pressures software licensing — compressing the multiple to a trough ~21× on the raised FY2026 EPS.
- Open-source and AI-generated EDA flows demonstrate a credible path toward commercial nodes, prompting the market to permanently haircut long-run per-design tool intensity — Q3 did not produce a filing that retires the July 2026 Kimi signal
- A subsequent print or 8-K tightens U.S. export-control or Entity List restrictions after this guide assumed none; Optical/PowerArtist (≈$110M) and closed Processor IP (≈$40M) already sit in the FY footnote and are not a still-pending deal haircut
- Q4 misses $2.53B or FY EDA fails to print the promised double-digit, and a cyclical downturn in auto/industrial multiphysics demand slows Ansys toward low single digits
The AI-disruption fear stays overblown at leading-edge nodes, FY2026 lands in the raised $15.04–15.10 non-GAAP EPS / ~41.5% OM / ~$2.6B FCF range, Design IP holds the YoY recovery, and Ansys synergies begin monetizing in FY2027 — supporting ~27× FY2027 non-GAAP EPS. Ladder held; do not mark this up because they beat.
- FY2026 non-GAAP EPS lands in the raised $15.04–$15.10 range with non-GAAP operating margin ~41.5% and FCF ~$2.6B; Q4 revenue lands in $2.530–2.580B
- Design IP holds the printed YoY return ($473.8M, +11%) rather than slipping back, and joint Synopsys-Ansys products (call: Multiphysics Fusion) book initial monetization in FY2027 toward $400M revenue synergies by year four
- EDA prints the guided double-digit for Q4 and FY (call), lifting organic Design Automation toward low-double-digits without needing a China reopening or a new export-control change
AI chip-design intensity re-accelerates organic EDA toward 12–15%, Ansys synergies ramp ahead of plan, and the multiphysics-plus-silicon bundle commands premium pricing — re-rating the multiple back toward 34× forward, roughly last-sourced sell-side (Yahoo 1y mean ~$558 / high $650).
- Joint Synopsys-Ansys workflows (call: Multiphysics Fusion; not yet a booked FY26 EDA line) are adopted by hyperscaler in-house silicon teams at premium ASPs, accelerating revenue synergies above $500M by FY2028
- Organic EDA growth inflects toward 15% as 3D-IC and chiplet packaging drive ~2× tool intensity per design, expanding TAM beyond the historic ~10% trajectory and de-risking the AI-disruption thesis
- Operating margin reaches 43%+ by FY2027 as integration costs roll off and AI productivity tools lift R&D efficiency, pushing non-GAAP EPS toward $18 and re-rating the stock toward analyst targets